Formal Verification of an ASML EUV Wafer Stepper
Goal: Model and verify safety-critical concurrency requirements for a simplified EUV wafer stepper controller.
Contribution: I built the formal model, translated operational requirements into CCS, LTL, and modal mu-calculus properties, and analyzed traces for unsafe vacuum-door behavior.
Deliverables: Formal specification notes, verification rationale, and a public case-study article.
Skills: Formal methods, model checking, requirements analysis, safety reasoning, process algebra.
Resources: CCS, LTL, modal mu-calculus, concurrency modeling, ASML-inspired manufacturing workflow.